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The GEC 2050 was an 8-bit minicomputer produced during the 1970s, initially by Marconi Elliott Computer Systems of the UK, before the company renamed itself GEC Computers Limited. The first models were labeled MECS 2050, before being renamed GEC 2050. The GEC 2050 was commonly used as a Remote Job Entry station, supporting a punched card reader, line printer, system console, and a data link to a remote mainframe computer system, and GEC Computers sold a complete RJE package including the system, peripherals, and RJE software. Another turnkey application was a ticketing system, whose customers included Arsenal Football Club. The system was also commonly used for road traffic control and industrial process automation. The GEC 2050 supported up to 64KiB of magnetic core memory in 4KiB, 8KiB and 16KiB modules. The system had a single Channel Controller for performing autonomous I/O, and used the same peripheral I/O controllers as the GEC 4000 series minicomputer. ==Instruction set== Although CISC, the instruction set is sufficiently simple to be tabulated in its entirety: Using the opcode 29 as an illustration, the assembler code (AD X2,X1,offset) causes the contents of the memory location 'offset(X1)' to be added to register X2. Thus, register X1 is being used as the index register, and the offset, v, is specified in the second byte of the instruction. G is a dummy index register whose value is alway zero, and hence causes the offsets to be treated as absolute addresses in the zeroth (global) segment. (Incidentally, since X3 is the standard index register, the assembler program allows ',X3,address' to be abbreviated to ',address'.) The conditional jump instructions are listed in pairs, the former opcode is for a forward jump, and the latter one for a backward jump. Again, the offset of the jump is obtained from the second byte of the instruction. Thus, all instructions in rows 0 to 7 and row 9 consist of two bytes (the opcode and a data byte) while all the other instructions consist of just a single opcode byte. The main accumulator register, A, can be set to be 1, 2, 3 or 4 bytes in length, using the SETL instructions. This controls how many bytes are loaded (or stored) in a memory-access instruction. The JIL instruction performs a Jump Indirect, like the JI instruction, but saves the value in the program counter, S, into the link register, L. This allows very simple non-recursive subroutine calls to be achieved. More complex subroutine calls involve the use of the PREP instruction, which saves the return information in the first bytes of the current memory segment. Such calls, too, cannot be recursive. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「GEC 2050」の詳細全文を読む スポンサード リンク
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